Written by
Yonghwan Kwon
π§βπ» About Me ππ
π Education
- B.S. in Electrical Engineering, Kyung Hee University (Feb, 2024)
- M.S. Student, Kyung Hee University
π Skills
- Programming: GUI programming with Python
- FPGA Development: Vivado, Quartus
- RTL Verification: VCS, Verdi
- RTL Synthesis: Design Compiler
- Physical Implementation: IC Compiler
- Physical Verification: StarRC, PrimeTime, Calibre
- IP Library Design: Virtuoso, Abstract Generator, PrimeLib, Hspice, Milkyway
π Papers
(To be updated)
π¬ Contact
- βοΈ Email: yonghwankwon.6658@gmail.com
- π· Instagram: @yhwan_0
- π» GitHub: yhkwon6658